1. Field of the Invention
This invention relates to a method for making a laminated chip and a method for aligning a lithographic mask.
2. Description of the Related Art
Referring to FIG. 1, a conventional method for making a laminated chip comprises: (a) providing a substrate 11 on a base 10; (b) forming a first patterned conductive layer 12 on the substrate 11 using a first lithographic mask 21 that has a first pattern 211; (c) forming a patterned insulating layer 13 on the first conductive layer 12 using a second lithographic mask 22 that has a second pattern 221, the second pattern 221 being different from the first pattern 211 such that a part of the first conductive layer 12 is exposed from the insulating layer 13; (d) forming a second patterned conductive layer 14 on the patterned insulating layer 13 using a third lithographic mask 23 that has a third pattern 231, the third pattern 231 being different from the first and second patterns 211, 221 such that a part of the second conductive layer 14 is formed on and connected to the exposed first conductive layer 12.
According to the designs of the first, second, and third patterns 211, 221, 231 of the first, second, and third lithographic masks 21, 22, 23, parts of the first and second conductive layers 12, 14 are connected to each other in connecting regions 111, and other parts of the first and second conductive layers 12, 14 are insulated from each other by the insulating layer 13.
In order to correctly form the patterned conductive layers 12, 14 and the patterned insulating layer 13 such that the first and second conductive layers 12, 14 may connect to each other at the predetermined connecting regions 111, the first, second, and third lithographic masks 21, 22, and 23 have to be accurately aligned during the method for making the laminated chip.
Moreover, when forming the patterned insulating layer 13 on the first conductive layer 12 using the second lithographic mask 22, the insulating material of the insulating layer 13, e.g., ceramic slurry, is likely to spread over the part of the first conductive layer 12 that is designed to be exposed from the insulating layer 13. Thus, the structural accuracy of the chip is adversely affected and short circuit and other circuit problems may be raised. Therefore, alignment of the lithographic mask during manufacture is necessary and significant.
Referring to FIG. 2, a conventional method for aligning a lithographic mask includes: forming a plurality of light-transmissible regions 311 on a base 31 of an alignment device; illuminating the light-transmissible regions 311 using a light source A such that the light-transmissible regions 311 serve as alignment references; laminating a patterned film 32 formed with a plurality of pattern structures 321, e.g., pattern holes, on the base 31 such that the pattern structures 321 are disposed corresponding to the light-transmissible regions 311 on the base 31; and disposing a lithographic mask 33 on the patterned film 32 in a way that mask alignment marks on the lithographic mask 33 are aligned with the pattern structures 321 of the patterned film 32.
In the aforesaid conventional method, before aligning the lithographic mask 33, it is necessary to separately prepare the patterned film 32 and align and laminate the film 32 on the base 31. These steps are conducted manually, thereby resulting in low accuracy, complicated manufacture, and increased costs.